1. Field of the Invention
The present invention relates to an ultraspeed transistor, and more particularly to a new type transistor which has a high drivability and which is well suited for a high degree of packaging.
2. Description of the Prior Art
As transistors which realize high densities of integration on Si substrates, the two major types of a bipolar transistor and a MOS (Metal-Oxide-Semiconductor) type field effect transistor [MOSFET] have heretofore been typical in view of the operating principles. When the bipolar transistor is defined as a vertical device which utilizes the physical phenomena of the diffusion and drift of minority carriers, the field effect transistor is a lateral device which utilizes the drive of majority carriers by an electric field.
In recent years, on account of the limitations of physical constants inherent in Si, ultraspeed devices employing compound semiconductors, principally, gallium-arsenic (GaAs) have been under development without altering the essential mechanisms of transistor operations.
Among them, a hetero-bipolar transistor (in, for example, the official gazette of Japanese Laid-open Patent Application No. 49-43583) and a selectively doped heterojunction type field effect transistor (in, for example, the official gazette of Japanese Laid-open Patent Application No. 56-94779) are mentioned as transistors which employ heterojunctions. From the viewpoint of the operating principle, the latter transistor is almost the same as the MOSFET. Meanwhile, in such transistors employing compounds, the essential portions of transistor operations do not differ from those of the devices employing Si, so that disadvantages innate in the bipolar transistor and the field effect transistor (hereinbelow, termed "FET") respectively remain unsolved.
More specifically, in case of the hetero-bipolar transistor, there is the disadvantage that the density of integration does not become as high as in the FET because an isolation region must be secured. In case of the bipolar transistor, there is the lower limit of the thickness of a base layer because of a restriction in the operating principle.
On the other hand, the field effect transistors are well suited for high integration, but the common disadvantage has been the problem that a great current cannot be taken out.